VXI?Corporation F80 Especificaciones

Pentek Model 6526 Operating Manual Page 1Manual Part No: 800.65260 Rev: A − September 20, 2000Pentek, Inc.One Park WayUpper Saddle River, NJ 07458(201

Page 10 Pentek Model 6526 Operating ManualPageTable of ContentsRev. AChapter 3: Memory Maps and Register Descriptions (continued)3.8.10 Interrupt Sta

Page 100 Pentek Model 6526 Operating ManualRev. A3.8 ‘C31 DSP Memory Maps and Registers (continued) Table 3−56: ‘C31 DSP Memory Map − Channel Formatt

Pentek Model 6526 Operating Manual Page 101Rev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)Table 3−58: ‘C31 DSP Memory Map − VME port DPSRAM,

Page 102 Pentek Model 6526 Operating ManualRev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)Table 3−59: ‘C31 DSP Memory Map − Internal, Time S

Pentek Model 6526 Operating Manual Page 103Rev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.1 ‘C31 LED Control Register − R/W @ ‘C31 Addre

Page 104 Pentek Model 6526 Operating ManualRev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.2 ‘C31 Sync Arm Register − R/W @ ‘C31 Address

Pentek Model 6526 Operating Manual Page 105Rev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.3 ‘C31 Sync Word Substitution Register − R/W @

Page 106 Pentek Model 6526 Operating ManualRev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.5 ‘C31 Control Register − R/W @ ‘C31 Address 0

Pentek Model 6526 Operating Manual Page 107Rev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.5 ‘C31 Control Register (continued)3.8.5.2 Syn

Page 108 Pentek Model 6526 Operating ManualRev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.6 Time Stamp Counter Output Register − R/W @ ‘

Pentek Model 6526 Operating Manual Page 109Rev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.7 Overload Detection Control Registers (contin

Pentek Model 6526 Operating Manual Page 11Rev. AChapter 1: Overview1.1 IntroductionThe Model 6526 is a 16−Channel, two input, Narrowband Digital Rece

Page 110 Pentek Model 6526 Operating ManualRev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.8 Interrupt Vector Register − R/W @ ‘C31 Addre

Pentek Model 6526 Operating Manual Page 111Rev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.9 Interrupt Mask Register (continued)NOTE: The

Page 112 Pentek Model 6526 Operating ManualRev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.12 Interrupt Status Register #2: Channel Forma

Pentek Model 6526 Operating Manual Page 113Rev. A3.8 ‘C31 DSP Memory Maps and Registers (continued)3.8.14 Built−In Self−Test (BIST) Register − R/W @

Page 114 Pentek Model 6526 Operating ManualRev. AThis page is intentionally blank

Pentek Model 6526 Operating Manual Page A−1Rev. AAppendix A: Boot EEPROM Source Code ListingA.1 Boot EPROM Source Code Listing.list** TITLE &ap

Page A−2 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued)** PROCESSOR INITIALIZATION FOR THE TMS320C30.***

Pentek Model 6526 Operating Manual Page A−3Rev. AA.1 Boot EPROM Source Code Listing (continued)*PATRN .word 0A5A5A5A5H ; .word 05A

Page A−4 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued)*INIT ;LDI 080h,

Pentek Model 6526 Operating Manual Page A−5Rev. AA.1 Boot EPROM Source Code Listing (continued)LDI @FUNLDWA,R0 ; Init UNLOAD BLOCK WOR

Page 12 Pentek Model 6526 Operating ManualRev. A1.4 Time Stamp CounterThe Time Stamp Counter is a 32−bit digital counter which acts as a master time

Page A−6 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued); STI R1,*+AR0(0) ; Set register

Pentek Model 6526 Operating Manual Page A−7Rev. AA.1 Boot EPROM Source Code Listing (continued)WAITIDLE ;B WAIT

Page A−8 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued)LDI 1,R0 ;STI R0,*+AR2(4)

Pentek Model 6526 Operating Manual Page A−9Rev. AA.1 Boot EPROM Source Code Listing (continued)CKBOOTFLDI @FBOOTL,AR1 ;LDI *AR1,R0

Page A−10 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued)sub_hLDI *AR1++(1),R1 ; load LSB half-wordAND

Pentek Model 6526 Operating Manual Page A−11Rev. AA.1 Boot EPROM Source Code Listing (continued)CALL FLASHI ;LDI @FSEQ55,AR3

Page A−12 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued)FLDWLNOP *AR1++ ;CALL FLASHU

Pentek Model 6526 Operating Manual Page A−13Rev. AA.1 Boot EPROM Source Code Listing (continued)AND @F80,R1 ;CMPI @F80,R1 ;

Page A−14 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued)LDI @FSEQRST,R0 ;STI R0,*AR3

Pentek Model 6526 Operating Manual Page A−15Rev. AA.1 Boot EPROM Source Code Listing (continued); Forward moving inversions memory test ldi

Pentek Model 6526 Operating Manual Page 13Rev. A1.7 RACEway InterfaceThe Model 6526’s RACEway interface is implemented using the Cypress PitCREWjr ch

Page A−16 Pentek Model 6526 Operating ManualRev. AA.1 Boot EPROM Source Code Listing (continued) ldi *ar6--,r1 ; Get test pattern

Pentek Model 6526 Operating Manual Page A−17Rev. AA.1 Boot EPROM Source Code Listing (continued)mt5er2 ldi 0e6h,r5 ; b

Page A−18 Pentek Model 6526 Operating ManualRev. AThis page is intentionally blank

Pentek Model 6526 Operating Manual Page B−1Rev. AAppendix B: RACEway Interlink ModulesB.1 OverviewTo join the RACEway busses of two or more boards, a

Page B−2 Pentek Model 6526 Operating ManualRev. AB.4 RACEway ILK 8 ExampleThe RACEway ILK 8 modules allows up to eight VMEbus slots to be connected t

Pentek Model 6526 Operating Manual Page B−3Rev. AB.4 RACEway ILK 8 Example (continued)B.4.1 ILK8 Example RACEway Transaction Routing CodesTable B−1, b

Page B−4 Pentek Model 6526 Operating ManualRev. AB.5 RACEway ILK12 ExampleThe RACEway ILK12 modules allow up to 12 VMEbus slots to be connected to th

Pentek Model 6526 Operating Manual Page B−5Rev. AB.6 RACEway ILK16 Example The RACEway ILK16 modules allow up to 16 VMEbus slots to be connected to th

Page B−6 Pentek Model 6526 Operating ManualRev. AThis page is intentionally blank

Pentek Model 6526 Operating Manual Graychip GC4014 Page C−1Rev.: AAppendix C: Graychip 4014C.1 IntroductionThe following pages are a reprint of the Gr

Page 14 Pentek Model 6526 Operating ManualRev. A1.10 Model 6526 Block DiagramThe block diagram for the Model 6526 is shown in Figure 1−1, below.Figur

Page C−2 Graychip GC4014 Pentek Model 6526 Operating ManualRev.: AThis page is intentionally blank

DSP CHIPS AND SYSTEMS 2185 Park Blvd.,FAX (650) 323-0206Palo Alto, CA 94306 GRAYCHIP (650) 323-2955 GC4014 QUAD RECEIVER CHIPDATASHEET April 27, 1999

GRAYCHIP, INC. - i - APRIL 27, 1999 GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5 This document contains information which may be changed at any time

GRAYCHIP, INC. - ii - APRIL 27, 1999 GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5 This document contains information which may be changed at any time

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GRAYCHIP, INC. - 1 - APRIL 27, 1999 GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5 This document contains information which may be changed at any time

GRAYCHIP, INC. - 2 - APRIL 27, 1999 GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5 This document contains information which may be changed at any time

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Pentek Model 6526 Operating Manual Page 15Rev. A1.11 SpecificationsReceiver Chips: 4 (four) Graychip GC4014s, 16−bit input data(See Appendix C for ch

GRAYCHIP, INC. - 5 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wit

GRAYCHIP, INC. - 6 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wit

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Page 16 Pentek Model 6526 Operating ManualRev. A1.11 Specifications (continued)VMEbus Interface: Slave; A32/D32; I1−7; Power up with no A24/A32 ad

GRAYCHIP, INC. - 15 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wi

GRAYCHIP, INC. - 16 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wi

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GRAYCHIP, INC. - 20 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wi

GRAYCHIP, INC. - 21 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wi

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Pentek Model 6526 Operating Manual Page 17Rev. AChapter 2: Installation and Connections2.1 InspectionAfter unpacking, inspect the unit carefully for

GRAYCHIP, INC. - 25 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wi

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Page 18 Pentek Model 6526 Operating ManualRev. AFigure 2−2: Model 6526 VME Board − Component Side Assembly DrawingSW1SW2JP3

GRAYCHIP, INC. - 35 - APRIL 27, 1999GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5This document contains information which may be changed at any time wi

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Pentek Model 6526 Operating Manual PitCREWjr Page D−1Rev.: AAppendix D: PitCREWjrD.1 IntroductionThe following pages are a reprint of the data sheet a

Page D−2 PitCREWjr Pentek Model 6526 Operating ManualRev.: AThis page is intentionally blank

fax id: 5715 Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600December 1995 - Revised July 25, 1997Int

Interfacing to RACEway: PitCREWjr2Figure 2. PitCREWjr Block DiagramTable 1. PitCREWjr Interface SignalsSignal Source FunctionFIFIO[31:0] PitCREWjr/Inp

Interfacing to RACEway: PitCREWjr3The RACEway protocol communicates data direction in bit 1of the address word. PitCREWjr’s slave state machinebranche

Pentek Model 6526 Operating Manual Page 19Rev. AFigure 2−3: Model 6526 VME Board − Solder Side Assembly Drawing

Interfacing to RACEway: PitCREWjr4as indicated by the deassertion of “MASTER,” PitCREWjrthree-states the FIFO data bus.Additional FeaturesA slave read

Interfacing to RACEway: PitCREWjr5Figure 5. Master ReadROUTE ADDRESS D0D0D1D1D2D2D3D3D4D4D5D5D6D6D7D7RTE ADDRESSSHIFTEDRTEMGOMASTERROUTEADDRCOUNTMR_ER

Interfacing to RACEway: PitCREWjr6Figure 8 shows a PitCREWjr master writing to a PitCREWjrslave across one RACEway crossbar. The slave signals havean

Interfacing to RACEway: PitCREWjr7Figure 8. Master Write Overflow111222333444555666777888999101010111111121212131313141414151515161616ROUTE ADDRESSRTE

Interfacing to RACEway: PitCREWjr8Figure 9. SRE FunctionADDRESSS. ROUTERTEADDRRTEROUTE ADDRESSS.R.RT AD0011223344556677SRESLAVEMGOMASTERROUTEADDRCOUNT

Interfacing to RACEway: PitCREWjr© Cypress Semiconductor Corporation, 1995. The information contained herein is subject to change without notice. Cypr

PitCREWjrPentek Model 6526 Operating ManualThis page is intentionally blank

Page 2 Pentek Model 6526 Operating ManualManual Revision History WarrantyPentek warrants that all products manufactured by Pentek conform to published

Page 20 Pentek Model 6526 Operating ManualRev. AFigure 2−4: Model 6526 Mezzanine Board − Solder Side Assembly Drawing

Pentek Model 6526 Operating Manual Page 21Rev. AFigure 2−5: Model 6526 Mezzanine Board − Component Side Assembly Drawing

Page 22 Pentek Model 6526 Operating ManualRev. A2.3 Jumper Block Settings on the Model 6526Most of the jumper blocks on the Model 6526 are for factor

Pentek Model 6526 Operating Manual Page 23Rev. A2.4 Model 6526 Front Panel The front panel of Pentek’s Model 6526 is shown in Figure 2−6, at the rig

Page 24 Pentek Model 6526 Operating ManualRev. AInput Connector Pin AssignmentsModel 6526−019 (Single−ended TTL)Pin Signal Pin Signal1 Ch B − D1 in 2

Pentek Model 6526 Operating Manual Page 25Rev. A2.4 Model 6526 Front Panel (continued)2.4.1 Digital Data Input Connector (continued)2.4.1.1 Connectin

Page 26 Pentek Model 6526 Operating ManualRev. A2.4 Model 6526 Front Panel (continued)2.4.1 Digital Data Input Connector (continued)2.4.1.2 Input Equ

Pentek Model 6526 Operating Manual Page 27Rev. A2.4 Model 6526 Front Panel (continued)2.4.2 Sync BusThe Model 6526 uses a Sync bus to support several

Page 28 Pentek Model 6526 Operating ManualRev. A2.4 Model 6526 Front Panel (continued)2.4.2 Sync Bus (continued)2.4.2.1 Sync Bus Connector (continued

Pentek Model 6526 Operating Manual Page 29Rev. A2.4 Model 6526 Front Panel (continued)2.4.2 Sync Bus (continued)2.4.2.2 Sync Bus / Receiver Assignmen

Pentek Model 6526 Operating Manual Page 3PageTable of ContentsRev. AChapter 1: Overview1.1 Introduction...

Page 30 Pentek Model 6526 Operating ManualRev. A2.4 Model 6526 Front Panel (continued)2.4.2 Sync Bus (continued)2.4.2.4 Sync Bus Equivalent CircuitEa

Pentek Model 6526 Operating Manual Page 31Rev. A2.4 Model 6526 Front Panel (continued)2.4.3 TMS320C31 Serial PortThe ‘C31 DSP processor features a se

Page 32 Pentek Model 6526 Operating ManualRev. A2.4 Model 6526 Front Panel (continued)2.4.5 LED IndicatorsThere are nine LED indicators on the front

Pentek Model 6526 Operating Manual Page 33Rev. A2.4 Model 6526 Front Panel (continued)2.4.5 LED Indicators (continued)2.4.5.6 DSP LEDThis yellow LED

Page 34 Pentek Model 6526 Operating ManualRev. AThis page is intentionally blank

Pentek Model 6526 Operating Manual Page 35Rev. AChapter 3: Memory Maps and Register Descriptions3.1 Programming OverviewThe Model 6526 is controlled

Page 36 Pentek Model 6526 Operating ManualRev. A3.2 VMEbus Address Modifier CodesThere are three addressing modes defined for VMEbus transfers: 32−b

Pentek Model 6526 Operating Manual Page 37Rev. A3.4 VMEbus A16 Slave MemoryVMEbus A16 address space on the Model 6526 is reserved for basic global bo

Page 38 Pentek Model 6526 Operating ManualRev. A3.4 VMEbus A16 Slave Memory (continued)3.4.1 VMEbus Board Control Register − R/W @ A16_base+0x00The V

Pentek Model 6526 Operating Manual Page 39Rev. A3.4 VMEbus A16 Slave Memory (continued)3.4.1 VMEbus Board Control Register (continued)3.4.1.3 Special

Page 4 Pentek Model 6526 Operating ManualPageTable of ContentsRev. AChapter 2: Installation and Connections (continued)2.4.3 TMS320C31 Serial Port .

Page 40 Pentek Model 6526 Operating ManualRev. A3.4 VMEbus A16 Slave Memory (continued)3.4.1 VMEbus Board Control Register (continued)3.4.1.8 VMEbus

Pentek Model 6526 Operating Manual Page 41Rev. A3.4 VMEbus A16 Slave Memory (continued)3.4.2 Sync Bus Control Register − R/W @ A16_base+0x04Only two

Page 42 Pentek Model 6526 Operating ManualRev. A3.4 VMEbus A16 Slave Memory (continued)3.4.3 VMEbus Interrupt to ‘C31 DSP − W. O. @ A16_base+0x08Any

Pentek Model 6526 Operating Manual Page 43Rev. A3.4 VMEbus A16 Slave Memory (continued)3.4.4 VMEbus Unique A24/A32 Base Address Register (continued)3

Page 44 Pentek Model 6526 Operating ManualRev. A3.4 VMEbus A16 Slave Memory (continued)3.4.5 VMEbus Broadcast A24/A32 Base Address Register − R/W @ A

Pentek Model 6526 Operating Manual Page 45Rev. A3.4 VMEbus A16 Slave Memory (continued)3.4.5 VMEbus Broadcast A24/A32 Base Address Register (continue

Page 46 Pentek Model 6526 Operating ManualRev. A3.4 VMEbus A16 Slave Memory (continued)3.4.6 Built−In Self−Test (BIST) Control Register − R/W @ A16_b

Pentek Model 6526 Operating Manual Page 47Rev. A3.5 VMEbus A24/A32 Global Slave Register MemoryThis section describes control and status functions co

Page 48 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued) 3.5.1 VMEbus Board Control Register − R

Pentek Model 6526 Operating Manual Page 49Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.2 Time Stamp Counter Control Register

Pentek Model 6526 Operating Manual Page 5PageTable of ContentsRev. AChapter 3: Memory Maps and Register Descriptions (continued)3.4.4 VMEbus Unique A

Page 50 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.2 Time Stamp Counter Control Register

Pentek Model 6526 Operating Manual Page 51Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.4 Sync Generator Mask Register − R/W @

Page 52 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.6 RACEway Status Register − R. O. @ RA

Pentek Model 6526 Operating Manual Page 53Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.6 RACEway Status Register (continued)3

Page 54 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.6 RACEway Status Register (continued)3

Pentek Model 6526 Operating Manual Page 55Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.7 Sync Generator Execute Register − R/

Page 56 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.8 Output FIFO Status Register − R. O.

Pentek Model 6526 Operating Manual Page 57Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.9 Clock Status Register − R. O. @ Cloc

Page 58 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.10 Input Data De−Skewing FIFOs (contin

Pentek Model 6526 Operating Manual Page 59Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.10 Input Data De−Skewing FIFOs (contin

Page 6 Pentek Model 6526 Operating ManualPageTable of ContentsRev. AChapter 3: Memory Maps and Register Descriptions (continued)3.5.7 Sync Generator

Page 60 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.11 Input FIFO A Delay Control Register

Pentek Model 6526 Operating Manual Page 61Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.13 Input FIFO A Control Register − R/W

Page 62 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.13 Input FIFO A Control Register (cont

Pentek Model 6526 Operating Manual Page 63Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.13 Input FIFO A Control Register (cont

Page 64 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.13 Input FIFO A Control Register (cont

Pentek Model 6526 Operating Manual Page 65Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.14 Input FIFO B Control Register − R/W

Page 66 Pentek Model 6526 Operating ManualRev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.14 Input FIFO B Control Register (cont

Pentek Model 6526 Operating Manual Page 67Rev. A3.5 VMEbus A24/A32 Global Slave Register Memory (continued)3.5.14 Input FIFO B Control Register (cont

Page 68 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register MemoryThis section describes control and status functio

Pentek Model 6526 Operating Manual Page 69Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued) 3.6.1 RACEway Data Packet Structure

Pentek Model 6526 Operating Manual Page 7PageTable of ContentsRev. AChapter 3: Memory Maps and Register Descriptions (continued)3.6 VMEbus A24/A32 Ch

Page 70 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.1 RACEway Data Packet Structure (

Pentek Model 6526 Operating Manual Page 71Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.2 Packet Start Code Register − R.

Page 72 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.3 Channel n ID Tag Register (cont

Pentek Model 6526 Operating Manual Page 73Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.4 Channel n Block Counter Output

Page 74 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.6 Channel n DDR Complex Output Da

Pentek Model 6526 Operating Manual Page 75Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.7 Packet Stop Code Register − R.

Page 76 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.8 Channel n Formatter Status Regi

Pentek Model 6526 Operating Manual Page 77Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.9 Channel n Formatter Control Reg

Page 78 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.9 Channel n Formatter Control Reg

Pentek Model 6526 Operating Manual Page 79Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.9 Channel n Formatter Control Reg

Page 8 Pentek Model 6526 Operating ManualPageTable of ContentsRev. AChapter 3: Memory Maps and Register Descriptions (continued)3.6.12 Channel n RACE

Page 80 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.9 Channel n Formatter Control Reg

Pentek Model 6526 Operating Manual Page 81Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.10 Channel n RACEway Packet Size

Page 82 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.11 Channel n Sync Code Word Regis

Pentek Model 6526 Operating Manual Page 83Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.12 Channel n RACEway Routing Regi

Page 84 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.12 Channel n RACEway Routing Regi

Pentek Model 6526 Operating Manual Page 85Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.12 Channel n RACEway Routing Regi

Page 86 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.13 Channel n RACEway Start Addres

Pentek Model 6526 Operating Manual Page 87Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.13 Channel n RACEway Start Addres

Page 88 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.14 Channel n RACEway End Address

Pentek Model 6526 Operating Manual Page 89Rev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.14 Channel n RACEway End Address

Pentek Model 6526 Operating Manual Page 9PageTable of ContentsRev. AChapter 3: Memory Maps and Register Descriptions (continued)3.8 ‘C31 DSP Memory M

Page 90 Pentek Model 6526 Operating ManualRev. A3.6 VMEbus A24/A32 Channel Formatter Register Memory (continued)3.6.14 Channel n RACEway End Address

Pentek Model 6526 Operating Manual Page 91Rev. A3.7 Dual Port Memory and Command TablesThe Dual Port Memory (DPSRAM) is used for passing parameters,

Page 92 Pentek Model 6526 Operating ManualRev. A3.7 Dual Port Memory and Command Tables (continued)The Command Table Space of the Dual Port SRAM is p

Pentek Model 6526 Operating Manual Page 93Rev. A3.7 Dual Port Memory and Command Tables (continued)The remainder of this section consists of subsecti

Page 94 Pentek Model 6526 Operating ManualRev. A3.7 Dual Port Memory and Command Tables (continued)3.7.1 Command Table Header Word #1: Command Contro

Pentek Model 6526 Operating Manual Page 95Rev. A3.7 Dual Port Memory and Command Tables (continued)3.7.1 Command Table Header Word #1: Command Contro

Page 96 Pentek Model 6526 Operating ManualRev. A3.7 Dual Port Memory and Command Tables (continued)3.7.2 Command Table Header Word #2: Channel Mask −

Pentek Model 6526 Operating Manual Page 97Rev. A3.7 Dual Port Memory and Command Tables (continued)3.7.4 Command Table Header Word #4: Command Status

Page 98 Pentek Model 6526 Operating ManualRev. A3.7 Dual Port Memory and Command Tables (continued)3.7.5 Command SetA list of commands is provided in

Pentek Model 6526 Operating Manual Page 99Rev. A3.8 ‘C31 DSP Memory Maps and RegistersThis section shows all memory resources available to the ‘C31 p